14.1 Frequency division

A binary counter inherently divides its clock. An N-bit counter clocked at f produces an output Q_{N-1} at f / 2^N. This is the most common application of counters in digital design:

14.2 Digital clocks

The everyday "digital clock" panel is a stack of counters:

14.3 Time delay generators

Need a controllable delay of T = N / f seconds? Preload a counter with the value N, clock it at frequency f, and gate the RCO pulse out. This is exactly the structure of the timer/counter peripherals in every microcontroller.

14.4 Event counting and tachometers

If you connect an external pulse train to the clock input of a counter instead of a steady clock, the counter becomes an event counter. Used in tachometers, particle counters and production lines.

14.5 Frequency measurement

Resolution = 1 / gate time. Used in every cheap bench frequency counter.

14.6 Programmable timing — pulse width modulation (PWM)

The output is HIGH for the first Duty clocks of every counter cycle and LOW for the rest. The duty cycle is Duty / Period, and the PWM frequency is f_clock / Period.

14.7 Sequencers and state machines

A counter plus a small decoder is the cheapest way to step through a fixed sequence of "phases" — for example the four-phase clock of an old microcontroller's instruction cycle, or the multi-step initialisation sequence of an SDRAM controller.

14.8 Application snapshot

A counter is the single most reused building block in all of digital design — every chapter of every datasheet has one.