Instruction Codes

An instruction code is a group of bits that instructs the computer to perform a specific operation. It is the interface between software and the micro-operations of the previous lesson.

   An instruction code is divided into FIELDS:

   +--------+------------------+
   | OPCODE |  ADDRESS / OPERAND |
   +--------+------------------+

   OPCODE  : WHAT operation to perform
   ADDRESS : WHERE the operand is (or the operand itself)

1. Operation Code (Opcode)

   An opcode of k bits can specify up to 2^k distinct operations.

   3-bit opcode  ->   8 operations
   4-bit opcode  ->  16 operations
   5-bit opcode  ->  32 operations
   8-bit opcode  -> 256 operations

Numerical you will be asked:

   Q: A computer has 64 distinct instructions and 4K words of memory.
      How many bits are needed for the instruction?

   Opcode bits  = log2(64) = 6
   Address bits = log2(4K) = log2(4096) = 12
   Instruction size = 6 + 12 = 18 bits (minimum, for a 1-address format)

2. The Basic Computer — Instruction Format

Morris Mano's basic computer (the standard textbook machine) has a 16-bit instruction word and 4096 words of 16-bit memory.

   MEMORY-REFERENCE INSTRUCTION:

    15   14  12  11                      0
   +---+-------+-------------------------+
   | I | Opcode|        Address          |
   +---+-------+-------------------------+
     1     3               12

   I      = addressing mode bit (0 = direct, 1 = indirect)
   Opcode = 000 to 110 (seven memory-reference instructions)
   Address= 12 bits -> 4096 memory locations


   REGISTER-REFERENCE INSTRUCTION:    opcode = 111, I = 0

    15  14  12 11                       0
   +---+-------+-------------------------+
   | 0 | 1 1 1 |   register operation    |
   +---+-------+-------------------------+
                Only ONE of the 12 bits is 1 (one-hot)


   INPUT-OUTPUT INSTRUCTION:          opcode = 111, I = 1

    15  14  12 11                       0
   +---+-------+-------------------------+
   | 1 | 1 1 1 |     I/O operation       |
   +---+-------+-------------------------+

The clever part: opcode 111 is not really an opcode — it is an escape code. With I = 0 the remaining 12 bits name a register operation; with I = 1 they name an I/O operation. This is how a 3-bit opcode field supports far more than 8 instructions.

3. Direct and Indirect Addressing

   I = 0  (DIRECT):    the address field holds the ADDRESS OF THE OPERAND

      Instruction: 0 001 0000 0100 0101   (ADD, address 045)
      Memory[045] = 1234    ->  operand = 1234

   I = 1  (INDIRECT):  the address field holds the ADDRESS OF THE ADDRESS

      Instruction: 1 001 0000 0100 0101   (ADD I, address 045)
      Memory[045] = 0300         <- this is a POINTER
      Memory[300] = 5678         ->  operand = 5678

   Indirect addressing costs ONE EXTRA MEMORY ACCESS.

4. Computer Registers of the Basic Computer

Why each register exists

   PC  : without it, the machine would not know where the next
         instruction is. It is incremented during every fetch.
   AR  : the memory needs ONE address source; every path to memory
         goes through AR, which keeps the memory interface simple.
   IR  : the instruction must stay available while it is decoded and
         executed, even though DR and AR are being reused.
   DR  : buffers the operand read from memory.
   AC  : the single "working" register of an accumulator machine.
   TR  : scratch space the programmer never sees.

5. Common Bus Connection

All eight registers plus memory share a single 16-bit bus selected by S2 S1 S0 (the table from the bus lesson). In addition:

   Each register has:
      LD (load)   : load from the bus on the next clock
      INR (increment): increment its contents
      CLR (clear) : reset to 0

   The memory has READ and WRITE control inputs.
   The AC has additional inputs from the ALU, DR, and INPR.

6. Common Bus Control Signals — a complete transfer

   Micro-operation:  AR <- PC

   Control signals asserted in one clock cycle:
      S2 S1 S0 = 010     (place PC on the bus)
      LD(AR)   = 1       (AR loads from the bus)

   Micro-operation:  DR <- M[AR]

      S2 S1 S0 = 111     (place the memory output on the bus)
      READ     = 1
      LD(DR)   = 1

7. Other Registers Present in Real CPUs

8. Instruction Set of the Basic Computer

Register-reference (opcode 7, I = 0):

   7800 CLA  clear AC             7040 CME  complement E
   7400 CLE  clear E              7020 CIR  circulate right AC and E
   7200 CMA  complement AC        7010 CIL  circulate left
   7008 INC  increment AC         7004 SPA  skip if AC positive
   7002 SNA  skip if AC negative  7001 SZA  skip if AC zero
   ...      SZE  skip if E zero   7001 HLT  halt

Input-output (opcode 7, I = 1):

   F800 INP  input character to AC      F400 OUT  output character from AC
   F200 SKI  skip on input flag         F100 SKO  skip on output flag
   F080 ION  interrupt on              F040 IOF  interrupt off

Summary

   Instruction code  = opcode + address
   k-bit opcode      -> 2^k operations
   Basic computer    : 16-bit instruction, 3-bit opcode, 12-bit address, 1 I bit
   Opcode 111        : escape to register-reference (I=0) or I/O (I=1)
   Registers         : AR, PC (12 bits); DR, AC, IR, TR (16); INPR, OUTR (8)

The next lesson runs these instructions — the fetch, decode and execute cycle, micro-operation by micro-operation.