Flip-Flop Conversion
Any flip-flop can be converted into any other by adding a small combinational network in front of its inputs. This is a guaranteed exam question, and the procedure is completely mechanical.
THE FOUR-STEP PROCEDURE
1. Write the CHARACTERISTIC table of the flip-flop you WANT (the target).
-> gives Q(n) and target inputs -> Q(n+1)
2. Write the EXCITATION table of the flip-flop you HAVE (the source).
-> gives Q(n) -> Q(n+1) : what source inputs are required
3. Build a combined table:
columns: [target inputs] [Q(n)] [Q(n+1)] [required source inputs]
4. K-map each source input in terms of the target inputs and Q(n).Reference Tables
Excitation tables (source side):
| Q(n) → Q(n+1) | S R | J K | D | T |
|---|---|---|---|---|
| 0 → 0 | 0 X | 0 X | 0 | 0 |
| 0 → 1 | 1 0 | 1 X | 1 | 1 |
| 1 → 0 | 0 1 | X 1 | 0 | 1 |
| 1 → 1 | X 0 | X 0 | 1 | 0 |
Characteristic equations (target side):
SR: Q(n+1) = S + R'Q D: Q(n+1) = D
JK: Q(n+1) = JQ' + K'Q T: Q(n+1) = T ⊕ Q---
Conversion 1 — SR to D
Target = D flip-flop, Source = SR flip-flop
D | Q(n) | Q(n+1) | S | R
--+------+--------+---+---
0 | 0 | 0 | 0 | X
0 | 1 | 0 | 0 | 1
1 | 0 | 1 | 1 | 0
1 | 1 | 1 | X | 0
K-map for S: K-map for R:
D=0 D=1 D=0 D=1
Q=0 | 0 | 1 | Q=0 | X | 0 |
Q=1 | 0 | X | Q=1 | 1 | 0 |
S = D R = D'
ANSWER: connect S = D and R = D' (one inverter).Conversion 2 — SR to JK
J K | Q(n) | Q(n+1) | S | R
----+------+--------+---+---
0 0 | 0 | 0 | 0 | X
0 0 | 1 | 1 | X | 0
0 1 | 0 | 0 | 0 | X
0 1 | 1 | 0 | 0 | 1
1 0 | 0 | 1 | 1 | 0
1 0 | 1 | 1 | X | 0
1 1 | 0 | 1 | 1 | 0
1 1 | 1 | 0 | 0 | 1
K-map for S (variables J, K, Q):
1s at (J=1,K=0,Q=0) and (J=1,K=1,Q=0); X at (J=0,K=0,Q=1) and (J=1,K=0,Q=1)
-> S = J.Q'
K-map for R:
1s at (J=0,K=1,Q=1) and (J=1,K=1,Q=1)
-> R = K.Q
ANSWER: S = J.Q' and R = K.Q (two AND gates)(This is exactly how a JK flip-flop is internally built from an SR — see the previous lesson.)
Conversion 3 — JK to D
D | Q(n) | Q(n+1) | J | K
--+------+--------+---+---
0 | 0 | 0 | 0 | X
0 | 1 | 0 | X | 1
1 | 0 | 1 | 1 | X
1 | 1 | 1 | X | 0
K-map for J: K-map for K:
D=0 D=1 D=0 D=1
Q=0 | 0 | 1 | Q=0 | X | X |
Q=1 | X | X | Q=1 | 1 | 0 |
J = D K = D'
ANSWER: connect J = D, K = D' (one inverter).Conversion 4 — JK to T
T | Q(n) | Q(n+1) | J | K
--+------+--------+---+---
0 | 0 | 0 | 0 | X
0 | 1 | 1 | X | 0
1 | 0 | 1 | 1 | X
1 | 1 | 0 | X | 1
J = T K = T
ANSWER: tie J and K together — that IS the T flip-flop.Conversion 5 — D to JK
J K | Q(n) | Q(n+1) | D
----+------+--------+---
0 0 | 0 | 0 | 0
0 0 | 1 | 1 | 1
0 1 | 0 | 0 | 0
0 1 | 1 | 0 | 0
1 0 | 0 | 1 | 1
1 0 | 1 | 1 | 1
1 1 | 0 | 1 | 1
1 1 | 1 | 0 | 0
D = Σm over (J,K,Q) of rows where D = 1
= (0,0,1), (1,0,0), (1,0,1), (1,1,0)
K-map (J K on columns, Q on rows):
J K
00 01 11 10
+------+------+------+------+
Q=0 | 0 | 0 | 1 | 1 |
+------+------+------+------+
Q=1 | 1 | 0 | 0 | 1 |
+------+------+------+------+
Group (Q=0, J=1) -> J.Q'
Group (Q=1, K=0) -> K'.Q
D = J.Q' + K'.Q <- this is just the JK characteristic equation ✓
ANSWER: 2 AND gates + 1 OR gate + 1 inverter.Conversion 6 — D to T
T | Q(n) | Q(n+1) | D
--+------+--------+---
0 | 0 | 0 | 0
0 | 1 | 1 | 1
1 | 0 | 1 | 1
1 | 1 | 0 | 0
D = T'Q + TQ' = T ⊕ Q
ANSWER: one XOR gate with inputs T and Q.Conversion 7 — T to D
D | Q(n) | Q(n+1) | T
--+------+--------+---
0 | 0 | 0 | 0
0 | 1 | 0 | 1
1 | 0 | 1 | 1
1 | 1 | 1 | 0
T = D'Q + DQ' = D ⊕ Q
ANSWER: one XOR gate with inputs D and Q. (Symmetric with conversion 6.)Conversion 8 — T to JK
J K | Q(n) | Q(n+1) | T
----+------+--------+---
0 0 | 0 | 0 | 0
0 0 | 1 | 1 | 0
0 1 | 0 | 0 | 0
0 1 | 1 | 0 | 1
1 0 | 0 | 1 | 1
1 0 | 1 | 1 | 0
1 1 | 0 | 1 | 1
1 1 | 1 | 0 | 1
T = 1 exactly when the state must change:
(Q=0 and J=1) or (Q=1 and K=1)
T = J.Q' + K.QMaster Conversion Table
| From ↓ / To → | D | T | JK | SR |
|---|---|---|---|---|
| D | — | D = T ⊕ Q | D = JQ' + K'Q | D = S + R'Q |
| T | T = D ⊕ Q | — | T = JQ' + KQ | T = SQ' + RQ |
| JK | J = D, K = D' | J = T, K = T | — | J = S, K = R |
| SR | S = D, R = D' | S = TQ', R = TQ | S = JQ', R = KQ | — |
Exam Checklist
✓ State clearly which is the TARGET and which is the SOURCE.
✓ Use the CHARACTERISTIC table of the target for Q(n+1).
✓ Use the EXCITATION table of the source for the required inputs.
✓ Include Q(n) as a K-map variable — conversion logic almost always needs feedback.
✓ Exploit the X entries; they usually collapse the answer to one or two literals.
✓ Draw the final circuit: conversion logic + the source flip-flop.Flip-flops on their own store one bit. Grouping them gives registers and counters — the subject of the last two Unit II lessons.