De-Multiplexer
A de-multiplexer (DEMUX) takes a single data input and routes it to one of 2^n output lines, chosen by n select lines. It is the exact inverse of a multiplexer.
1. 1-to-4 De-Multiplexer
| S1 | S0 | Y3 | Y2 | Y1 | Y0 |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | D |
| 0 | 1 | 0 | 0 | D | 0 |
| 1 | 0 | 0 | D | 0 | 0 |
| 1 | 1 | D | 0 | 0 | 0 |
Y0 = D . S1' . S0'
Y1 = D . S1' . S0
Y2 = D . S1 . S0'
Y3 = D . S1 . S0
Hardware: 2 inverters + 4 three-input AND gates
The unselected outputs are forced to 0 — only one line carries the data at any instant.
2. 1-to-8 De-Multiplexer
Y(i) = D . (minterm i of S2 S1 S0)
Y0 = D.S2'S1'S0' Y4 = D.S2 S1'S0'
Y1 = D.S2'S1'S0 Y5 = D.S2 S1'S0
Y2 = D.S2'S1 S0' Y6 = D.S2 S1 S0'
Y3 = D.S2'S1 S0 Y7 = D.S2 S1 S0
3. DEMUX and Decoder — the same silicon
A 1-to-2^n de-multiplexer is identical to an n-to-2^n decoder with an enable input, where the DEMUX data line plays the role of the decoder's enable.
Decoder view : select lines = the code inputs, D = ENABLE
With D = 1, exactly one output goes high -> pure decoding.
DEMUX view : select lines = the address, D = the data being routed.
Same circuit, two names, chosen by what you connect to D.
This is why manufacturers sell one chip (e.g. 74138) labelled "3-to-8 decoder / 1-to-8 demultiplexer".
4. Cascading
Build a 1-to-16 DEMUX from two 1-to-8 DEMUXes:
Data D -> both chips' data inputs
S2 S1 S0 -> both chips' select inputs
S3 -> ENABLE of chip 1 (active when S3 = 0)
ENABLE of chip 2 (active when S3 = 1)
S3 chooses which half is live; S2..S0 choose the line within that half.
5. Implementing Boolean Functions with a DEMUX/Decoder
Because each output is one minterm, a DEMUX plus an OR gate realises any function:
F(A,B,C) = Σm(1, 3, 5, 7)
Feed A B C to the select lines, tie D = 1.
F = Y1 + Y3 + Y5 + Y7 (one 4-input OR gate)
For the COMPLEMENT, OR the remaining outputs, or use NAND outputs:
F' = Y0 + Y2 + Y4 + Y6
With active-LOW decoder outputs (the common case) use a NAND gate instead of an OR gate — the result is the same function.
6. MUX vs DEMUX
| Basis | Multiplexer | De-Multiplexer |
|---|---|---|
| Inputs | 2^n data + n select | 1 data + n select |
| Outputs | 1 | 2^n |
| Job | Many → one | One → many |
| Nickname | Data selector | Data distributor |
| Analogy | Rotary switch selecting a source | Rotary switch choosing a destination |
| Related block | — | Same as a decoder with enable |
| Typical IC | 74151 (8:1) | 74138 (1:8) |
7. Where MUX + DEMUX Are Used Together
This is time-division multiplexing — four channels share one physical wire because the MUX and DEMUX step through the same select sequence in lock-step. Telephone trunks, serial buses and memory data paths all use this structure.
8. Applications
| Application | Detail |
|---|---|
| Serial-to-parallel conversion | Sweep the selects while data arrives serially |
| Memory / device address decoding | Select which chip responds to an address |
| Clock distribution | Route a clock to one of several sub-modules |
| ALU output routing | Send a result to the chosen destination register |
| Data acquisition | Return a multiplexed sensor stream to individual channels |
Next: the decoder, which is this same circuit used for its most important CPU role — address decoding.