Multiplexer

A multiplexer (MUX) selects one of 2^n input lines and routes it to a single output, under the control of n select lines. It is a digitally controlled rotary switch.

1. 2-to-1 MUX

   Y = S'.I0 + S.I1

2. 4-to-1 MUX

   Y = S1'S0'.I0 + S1'S0.I1 + S1S0'.I2 + S1S0.I3

   Hardware: 2 inverters + 4 three-input AND gates + 1 four-input OR gate

3. 8-to-1 MUX

   Y = Σ (over i = 0..7) [ minterm(S2,S1,S0 = i) . I(i) ]

     = S2'S1'S0'.I0 + S2'S1'S0.I1 + S2'S1S0'.I2 + S2'S1S0.I3
     + S2S1'S0'.I4  + S2S1'S0.I5  + S2S1S0'.I6  + S2S1S0.I7

General rule: a MUX with n select lines handles 2^n data inputs. Conversely, 2^n inputs need log2(2^n) = n select lines.

4. Enable Input

Most MUX ICs have an enable (E) or strobe pin:

   E = 1 (active)   ->  Y = selected input
   E = 0 (disabled) ->  Y = 0  (or high-impedance in tri-state versions)

   With enable:  Y = E . (S'I0 + S.I1)

Enable pins are what let you cascade small MUXes into larger ones.

5. Building a Larger MUX from Smaller Ones

8-to-1 from two 4-to-1 plus one 2-to-1

   MUX-A (4:1) : inputs I0..I3, selects S1 S0   -> output YA
   MUX-B (4:1) : inputs I4..I7, selects S1 S0   -> output YB
   MUX-C (2:1) : inputs YA, YB, select S2       -> output Y

   S2 = 0  ->  Y = YA (one of I0..I3)
   S2 = 1  ->  Y = YB (one of I4..I7)          ✓ complete 8:1

   16-to-1 from 4-to-1 MUXes:  four 4:1 MUXes (S1 S0) + one 4:1 MUX (S3 S2)
                               = 5 MUX ICs

6. MUX as a Universal Logic Element — the star exam topic

A 2^n-to-1 MUX can implement ANY Boolean function of n variables — connect the variables to the select lines and the truth-table output column to the data inputs.

Method A — n variables, 2^n-to-1 MUX

   Implement F(A,B,C) = Σm(1, 3, 5, 6) using an 8-to-1 MUX.

   Connect A -> S2, B -> S1, C -> S0.
   Data inputs = the truth table output column:

     I0 = 0   (m0 not in list)
     I1 = 1
     I2 = 0
     I3 = 1
     I4 = 0
     I5 = 1
     I6 = 1
     I7 = 0

   No gates needed at all.

Method B — n variables, 2^(n−1)-to-1 MUX (the "one variable to the data lines" trick)

   Implement F(A,B,C) = Σm(1, 3, 5, 6) using a 4-to-1 MUX.

   Use A, B as selects; express each pair of minterms in terms of C.

   Pair up the truth table in groups of two:

     S1S0 = 00  ->  rows m0(C=0), m1(C=1)  ->  F = 0, 1  ->  I0 = C
     S1S0 = 01  ->  rows m2(C=0), m3(C=1)  ->  F = 0, 1  ->  I1 = C
     S1S0 = 10  ->  rows m4(C=0), m5(C=1)  ->  F = 0, 1  ->  I2 = C
     S1S0 = 11  ->  rows m6(C=0), m7(C=1)  ->  F = 1, 0  ->  I3 = C'

   Wiring: I0 = I1 = I2 = C, I3 = C'.  One inverter, one 4:1 MUX.

The four possible data-line values in Method B:

Worked Method B example 2

   F(A,B,C,D) = Σm(0, 1, 3, 4, 8, 9, 15) using an 8-to-1 MUX.

   Selects: A, B, C   ->   data lines expressed in D.

   S = ABC = 000 -> m0(D=0)=1, m1(D=1)=1   ->  I0 = 1
   S = 001       -> m2 = 0,    m3 = 1      ->  I1 = D
   S = 010       -> m4 = 1,    m5 = 0      ->  I2 = D'
   S = 011       -> m6 = 0,    m7 = 0      ->  I3 = 0
   S = 100       -> m8 = 1,    m9 = 1      ->  I4 = 1
   S = 101       -> m10 = 0,   m11 = 0     ->  I5 = 0
   S = 110       -> m12 = 0,   m13 = 0     ->  I6 = 0
   S = 111       -> m14 = 0,   m15 = 1     ->  I7 = D

7. Applications of a Multiplexer

8. Standard ICs

Summary

   n select lines  ->  2^n data inputs  ->  1 output
   Y = Σ (minterm of selects) . (corresponding data input)
   A 2^n : 1 MUX implements ANY n-variable function directly,
   and any (n+1)-variable function using one extra inverter.

The de-multiplexer, next, runs the same idea backwards.