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Unit 1: Addressing Modes with Worked EA Calculations

Lesson 3 of 17 in the free Logical Organization of Computer-II notes on Siksha Sarovar, written by Rohit Jangra.

2.1 What Is an Addressing Mode?

An addressing mode is the rule that tells the CPU how to interpret the address field of an instruction to find the operand. The Effective Address (EA) is the final memory address of the operand after applying that rule.

Why so many modes? Each mode is a hardware answer to a software pattern: arrays need indexing, pointers need register indirect, loops need auto-increment, position-independent code needs relative, constants need immediate. Knowing which pattern each mode serves is what separates an advanced answer from a definition dump.

2.2 The Complete Mode Catalogue

ModeEA RuleOperandTypical Use
ImpliednoneImplicit in opcode (e.g., CMA complements AC)Accumulator/stack ops
ImmediatenoneInside the instruction itselfConstants (MVI A, 05)
Direct (absolute)EA = address fieldM[EA]Global variables
IndirectEA = M[address field]M[EA]Pointers in memory
RegisternoneIn register RFast scratch values
Register IndirectEA = content of RM[EA]Pointer in a register
Auto-incrementEA = R, then R ← R + 1M[EA]Stepping through arrays
Auto-decrementR ← R − 1 first, EA = RM[EA]Stack-like traversal
RelativeEA = PC + address fieldM[EA]Branches, position-independent code
IndexedEA = XR + address fieldM[EA]Array element: base in instruction, index in XR
Base registerEA = BR + address fieldM[EA]Relocation: base in BR, displacement in instruction

Indexed vs base register — the classic confusion: structurally identical (register + constant), but in indexed mode the address field holds the array's start and the register holds the moving index; in base mode the register holds the segment start and the field holds a fixed offset. The distinction is usage, and examiners ask exactly that.

2.3 The Standard Worked Example (Learn This Cold)

A two-word instruction "load to AC" sits at addresses 200–201; word 201 holds the address field 500. Registers: PC = 200, R1 = 400, XR = 100. Memory: M[399] = 450, M[400] = 700, M[500] = 800, M[600] = 900, M[702] = 325, M[800] = 300.

After fetching both words, PC = 202 (this is the value used for relative mode — the #1 exam trap).

ModeEA CalculationEAAC Gets
DirectEA = 500500M[500] = 800
Immediateoperand is word 201201500 itself
IndirectEA = M[500] = 800800M[800] = 300
RelativeEA = PC + 500 = 202 + 500702M[702] = 325
IndexedEA = XR + 500 = 100 + 500600M[600] = 900
Registeroperand in R1400
Register IndirectEA = R1 = 400400M[400] = 700
Auto-incrementEA = R1 = 400, then R1 ← 401400M[400] = 700
Auto-decrementR1 ← 399 first, EA = 399399M[399] = 450

Digit check for relative mode: 202 + 500 → 2+0 = 2 (units), 0+0 = 0 (tens), 2+5 = 7 (hundreds) → 702.

2.4 Traps and "Why" Points Examiners Reward

  1. Relative mode uses the updated PC (after the fetch of the full instruction), not the instruction's own address. Using 200 instead of 202 costs the whole numerical.
  2. Auto-decrement decrements before the access; auto-increment increments after. The asymmetry exists so the pair can implement PUSH/POP on a memory stack.
  3. Indirect mode costs one extra memory read — questions on instruction timing must count it.
  4. Immediate mode has no EA — writing "EA = 201" earns partial credit only if you explain that 201 is where the operand resides, not a computed EA.
  5. One instruction set can combine modes (e.g., indexed + indirect); compute strictly in the order the mode definition states.

🎯 Exam Focus

  1. Define effective address. Explain any eight addressing modes with one practical use each.
  2. Using the standard setup of Section 2.3 but with address field 350, XR = 200, PC after fetch = 302, M[350] = 4000, M[550] = 25, M[652] = 66, M[4000] = 91: compute the operand loaded in direct, indirect, relative, indexed and immediate modes.
  3. Differentiate indexed addressing from base-register addressing. Why do both exist?
  4. Which addressing modes require zero, one and two memory references for the operand? Tabulate.
  5. Show how auto-increment and auto-decrement modes implement POP and PUSH on a stack that grows toward lower addresses.
  6. A branch instruction at address 750 (one word) uses relative mode with offset −53. What is the branch target?