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Unit 4 — Asynchronous Data Transfer

Lesson 40 of 49 in the free Computer Organization and Architecture notes on Siksha Sarovar, written by Rohit Jangra.

Synchronous vs Asynchronous Transfer

   SYNCHRONOUS: the sender and receiver share a COMMON CLOCK.
                Transfer occurs at known clock instants.
                Used inside the CPU and between CPU and memory.

   ASYNCHRONOUS: the two units have INDEPENDENT clocks.
                 Timing signals must be sent with the data to tell the
                 receiver when data is valid.
                 Used between the CPU and peripherals.

1. Strobe Control

A single control line called a strobe announces the time at which data is valid.

Source-initiated strobe

   The SOURCE places data on the bus, waits for it to settle,
   then pulses the strobe.

   Data   ----<========== valid data ==========>-----
   Strobe ________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|_________________
                  ^                ^
                  data is already  destination must have
                  stable here      captured it by now
   Sequence:
      1. Source places the data on the bus.
      2. Source waits (settling time), then activates the strobe.
      3. Destination captures the data (usually on the trailing edge).
      4. Source deactivates the strobe and removes the data.

Destination-initiated strobe

   The DESTINATION pulses the strobe to REQUEST data;
   the source responds by placing data on the bus.

   Strobe ______|‾‾‾‾‾‾‾‾‾‾‾‾|_______________
   Data   ------------<===== valid =====>-----

The fatal weakness of strobe control

   The source has NO WAY OF KNOWING whether the destination actually
   received the data:

      - the destination might have been busy
      - the destination might not even be connected
      - the destination might be too slow

   Likewise the destination cannot know whether the source has
   placed valid data. There is no feedback -> data can be silently lost.

2. Handshaking

Handshaking adds a second control line so that each unit informs the other of its state. This is the standard asynchronous method.

Source-initiated handshaking (two lines: "data valid", "data accepted")

   Sequence:

   1. Source places data on the bus and activates DATA VALID.
   2. Destination accepts the data and activates DATA ACCEPTED.
   3. Source sees DATA ACCEPTED, disables DATA VALID and removes the data.
   4. Destination sees DATA VALID go low and disables DATA ACCEPTED.
   5. The system is back to the initial state, ready for the next word.
   Timing:

   Data          ---<========== valid data ==========>------
   Data valid    ___|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|________________
   Data accepted _________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|__________
                     (1)   (2)             (3)   (4)

Destination-initiated handshaking (lines: "ready for data", "data valid")

   1. Destination activates READY FOR DATA.
   2. Source places data on the bus and activates DATA VALID.
   3. Destination accepts the data and disables READY FOR DATA.
   4. Source disables DATA VALID and removes the data.

3. Advantages of Handshaking

AdvantageExplanation
ReliabilityEach unit confirms it has done its part
Speed independenceThe transfer runs at the speed of the slower unit — no fixed timing assumption
Error detectionA timeout on a missing response signals a failure or a disconnected device
No shared clockThe two units can have completely unrelated clocks
   Timeout mechanism:
      Each unit starts a timer when it activates its control line.
      If the expected response does not arrive before the timer expires,
      the transfer is aborted and an error is reported.
      This is how a computer survives a disconnected/faulty device.

4. Strobe vs Handshaking

BasisStrobe controlHandshaking
Control lines12
AcknowledgementNoneYes
ReliabilityLow — data can be lost silentlyHigh
SpeedFaster (fewer transitions)Slower (four transitions per word)
Error detectionNot possibleTimeout detects faults
HardwareSimplerMore complex
UseSimple, well-matched devicesGeneral peripheral communication

5. Asynchronous Serial Transfer

When data is sent one bit at a time over a single line, the receiver needs to know where each character begins.

   Character framing:

   idle   START |  D0 D1 D2 D3 D4 D5 D6 D7  | PARITY | STOP  idle
   ‾‾‾‾‾‾‾|_____|  <---- 8 data bits ---->  |        |‾‾‾‾‾‾‾‾‾‾‾‾
          ^ always 0                                    ^ always 1
   Rules:
      - The line idles at logic 1.
      - A START bit (logic 0) marks the beginning of a character.
      - 5 to 8 DATA bits follow, LSB first.
      - An optional PARITY bit provides single-error detection.
      - 1, 1.5 or 2 STOP bits (logic 1) end the character.

   The receiver detects the 1->0 start transition, then samples each
   subsequent bit at the MIDDLE of its bit period using its own clock.

Baud rate calculation

   Baud rate = number of signal changes per second.
   For a binary two-level signal, baud rate = bits per second.

   Q: At 9600 baud with 1 start bit, 8 data bits, 1 parity bit and
      1 stop bit, how many characters per second are transmitted?

      Bits per character = 1 + 8 + 1 + 1 = 11
      Characters/second  = 9600 / 11 = 872.7  ->  about 872 chars/s
   Q: A terminal transmits 10 characters per second in 10-bit frames.
      What is the baud rate?

      10 chars/s x 10 bits = 100 baud

6. Synchronous Serial Transfer

   No start/stop bits. Instead:
      - The clock is transmitted separately, or embedded in the data
        (Manchester encoding), or recovered by a PLL.
      - Data is sent in large BLOCKS preceded by SYNC characters.

   Efficiency: much higher (no 20% framing overhead per character),
   but the hardware is more complex.
BasisAsynchronous serialSynchronous serial
FramingStart/stop bits per characterSYNC characters per block
Overhead~20%Very low
ClockIndependent, resynchronised each characterShared or recovered
SpeedLowerHigher
UseKeyboards, terminals, RS-232Networks, disk interfaces

7. Asynchronous Communication Interface Registers

   A UART presents four registers to the CPU:

      Transmitter register : the byte to be sent
      Receiver register    : the byte just received
      Control register     : baud rate, word length, parity, stop bits
      Status register      : transmitter empty, receiver full,
                             parity error, framing error, overrun error
Error flagMeaning
Parity errorThe parity bit does not match the data
Framing errorThe stop bit was not 1 — clocks are mismatched
Overrun errorA new character arrived before the previous one was read

Summary

   Strobe        : 1 line, no acknowledgement, data can be lost
   Handshaking   : 2 lines, mutual acknowledgement, reliable, timeout-capable
   Async serial  : start bit + data + parity + stop bit per character
   Baud rate     : signal changes per second; chars/s = baud / bits-per-frame

Handshaking tells the CPU how to transfer one word safely. The next lesson answers the bigger question: how should the CPU spend its time while waiting?