Logic Gate Family

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Combined Truth Table (2-input gates)

NOT Gate (1-input): A=0 → NOT=1; A=1 → NOT=0

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NAND Gate as Universal: Implementing NOT, AND, OR

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SOP (Sum of Products) and POS (Product of Sums)

SOP = OR of AND terms. Each AND term is a minterm. Example: F = A'B + AB' + AB

POS = AND of OR terms. Each OR term is a maxterm. Example: F = (A+B)·(A'+B)

Minterm Table (3 variables A, B, C)

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Boolean Simplification Worked Example

F = A'B + AB' + AB

Step 1: F = A'B + AB' + AB Step 2: Group AB' + AB = A(B'+B) = A·1 = A Step 3: F = A'B + A Step 4: By absorption, A + A'B = A + B Result: F = A + B ✓ (reduced from 5 gates to 1 OR gate)

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Comprehensive Gate Comparison Table

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Study Deep: CMOS Technology and NAND Preference

In CMOS (Complementary Metal-Oxide-Semiconductor), a NAND gate requires only 4 transistors vs AND gate's 6. This is because:

• NAND = series NMOS pull-down + parallel PMOS pull-up (4 transistors total)
• AND = NAND + inverter = 4 + 2 = 6 transistors

This is why NAND gates are the preferred building block in VLSI design. Most standard cell libraries are NAND-based.

📝 Exam Tips: - XOR = 1 when inputs differ; XNOR = 1 when inputs are same - NAND is universal: NOT(A) = NAND(A,A); AND(A,B) = NAND(NAND(A,B), NAND(A,B)) - NOR(A,A) = NOT(A); NOR(NOT(A), NOT(B)) = AND(A,B)