1.1 The Control Unit's Job

Unit 1 ended with Boolean control functions like LOAD(AR) = T0 + T2 + D7′·I·T3. The control unit (CU) is whatever circuit generates all such signals, every cycle, in the right order. Two competing implementations exist, and their comparison is one of the most repeated 10-mark questions in this paper.

1.2 Hardwired Control

The decoded opcode (D0–D7), timing signals (T0–T15), mode bit I and status flags feed a block of fixed combinational logic (gates/PLA) whose outputs are the control signals directly.

• Speed: signals emerge after a few gate delays → fastest possible control. This is why RISC processors use it.
• Rigidity: changing or adding one instruction means redesigning and re-fabricating logic. Design errors are catastrophic post-production.
• Complexity growth: the logic explodes as the instruction set grows — impractical for very rich ISAs.

1.3 Microprogrammed Control

Wilkes' insight (1951): the control signals for each step are just bits. Store them as words — microinstructions — in a special ROM called the control memory (CM). Executing an instruction = walking through its microprogram (routine of microinstructions).

Hardware datapath of the CU itself:

IR(opcode) -> [Mapping logic] --\
                                v
[CAR: control address register] -> [Control Memory ROM] -> [CDR/microinstruction]
     ^                                                        |-> control signals
     |__ [Sequencer: CAR+1 | branch AD | map | return SBR] <--|   (+ next-address info)

• CAR holds the address of the current microinstruction; SBR saves a return address for micro-subroutines.
• A control memory of 1024 words needs a 10-bit CAR (2¹⁰ = 1024) — instant one-mark computation.

1.4 Microinstruction Format (Mano's 20-bit Example)

• F1–F3: each encodes one micro-operation (e.g., F1 = 001 → ADD, 100 → DR ← M[AR]). Three fields → up to three parallel micro-ops per word, provided they use different fields.
• CD: selects the condition to test (always / indirect bit I / sign bit S / zero Z).
• BR: what to do next — jump/call to AD, return from SBR, or map the opcode into CM.
• Mapping example: opcode bits 1011 map to CM address 0 1011 00 = 0101100₂ = 44, giving each opcode a 4-word microroutine slot.

1.5 Horizontal vs Vertical Microinstructions

The design "why": horizontal buys speed and parallelism with silicon; vertical buys compactness with an extra decode step. Real machines often mix both (encoded fields where signals are mutually exclusive).

1.6 The Master Comparison Table

Microprogramming also enables emulation — one CPU can interpret another machine's instruction set by loading different microcode — a favourite "state one unique advantage" answer.

🎯 Exam Focus

1. Differentiate hardwired and microprogrammed control units (any six points, with typical use cases).
2. Define: control word, microinstruction, microprogram, control memory.
3. A control memory has 4096 words of 24 bits. What are the sizes of CAR and CDR?
4. Explain the microinstruction format F1F2F3-CD-BR-AD and the purpose of each field.
5. Compare horizontal and vertical microprogramming; compute the width saved by encoding 64 signals into 4 fields of 16 signals each.
6. How does the mapping logic convert opcode 0110 into a control-memory address in Mano's scheme?